ASIC/Layout Design Engineer


ARMENIA – Yerevan

Job Description and Requirements

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.


-Synopsys is looking for ASIC/Layout Design Engineer who will be responsible for design, verification, and documentation for ASIC and contributes to the development of multi-dimensional designs involving the layout of complex integrated circuits.

Required Qualifications:

-Good knowledge of layout and schematic designs. Be familiar with semiconductor physics.
-Good knowledge of layout of standard cell, IO devises, core devises, resistors and diodes.
-Good knowledge of physics of ESD, Latch-up, Electromigration and Antenna Effect.
-Prior knowledge and experience of Custom Compiler tool.
-Demonstrates good analysis and problem-solving skills.
-Has a strong desire to learn and explore new technologies.
-Typically requires no previous professional experience