Instigate Semiconductor CJSC recruits Lead/Senior Digital Design Engineer in Yerevan.
Salary: 900000 AMD – 2200000 AMD Gross a month


- ASIC Core Blocks Design
- Creating RTL to integrate various components (e.g. RiscV CPU, AMBA switch/NOC infrastructure, USB Core,... )
- Writing detailed design implementation and specification
- Knowledge on ASIC Implementation flows including Synthesis and Timing analysis a)Timing constraint creation b) Support off logic verification activities c) Support off PNR process d) Block level STA and LEC sign off
- AXI to proprietary internal bus structure
- Clock monitoring blocks and other logic design
- DDR controller integration
- Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges
- Ability to work independently and to schedule requirements

Required Qualifications:

- BS and MS degree in Computer Science or in a related field
- 5+ years of relevant experience
- Strong knowledge on digital fundamentals and understanding of FPGA/ASIC custom chip flow
- Hands on knowledge on Verilog/SystemVerilog
- Familiarity with at least three of the areas listed below a) RiscV or ARM CPUs b) AMBA Bus Interconnect c) Ethernet d) USB e) SD/MMC f) PCIe g) DDR/LPDDR h) Security related functions, encryption, decryption etc
- Experience with UNIX shell scripting, tcl and python scripting
- Experience on writing a detailed design implementation specification
- Good analytical, oral, and written communication skills
- Work with teams to optimize verification quality
- Review the Code with peers
- Detail-oriented, self-motivated individual with strong analytical and research skills
- Be a mentor for automation teammates
- Positive attitude, enthusiasm, motivation, and desire for continuous improvement