Overview

Responsibilities:

  • Hands on project experience in RTL Verification

  • Strong knowledge on digital fundamentals and understanding of FPGA/ custom chip flow

  • Hands on knowledge on Verilog and SystemVerilog

  • Hands on knowledge in C/ C++ language

  • Experience in FPGA programming and related software usage with Firmware

  • Exposure to SVF and STAPL/JAM: Adaptive FPGA Programming is a plus

  • Good Knowledge in logic design and analysis

  • Experience with UNIX shell scripting or Perl scripting

  • Experience in Verilog, SystemVerilog, UVM

  • Exposure to SoC FPGA flow concepts

  • Exposure to Gate Level Simulations and Firmware Verification

  • Exposure to knowledge on System Verilog Assertions, Functional Coverage and Scoreboard

  • Experience with leading edge simulator tools is recommended

  • Good analytical and problem solving skills

  • Excellent written and verbal communication in English.

Required Qualifications:

BSEE or MSEE