Overview

Responsibilities:
  • Participation in the development, simulation and RTL verification of Microchip FPGA/SoC products, ensuring the reliability and efficiency of designs
  • Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility
  • Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs
  • Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tapeout
  • Develop and maintain reusable internal intellectual properties (IPs) tailored for computing applications
  • Provide crucial support for testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product
  • Contribute to design reviews and cross-functional discussions, offering insights and recommendations to enhance product performance and reliability
  • Stay up to date with industry trends and advancements in RTL design methodologies, integrating innovative techniques to improve product quality and efficiency
  • Collaborate with cross-functional teams, including software, architecture, and verification teams, to achieve cohesive and successful product development and delivery
Required Qualifications:
  • BS/MS with 5+ years of experience with emphasis on RTL/SoC/digital design
  • Experience with Verilog and system Verilog
  • Experience with Questa or other industry standard tools
  • Experience with hardware/software co-simulation
  • Understanding of the design flow. Ability to work with the backend team
  • Familiarity with AMBA family APB, AHB and AXI Protocols
  • Familiarity with RISC/Arm or other core architectures
  • Ability to work both independently and as a team player
  • Ability to write documentation for developed IP block
Note:

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